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Computed, interactive, verified

Signal Integrity & High-Speed Digital Design

Seventeen decks in five sections on getting a signal from one chip to another intact — the physics of the channel, the mechanisms that close an eye, and the arithmetic a standard uses to decide a channel is legal.

Every number on every slide is computed by a model in si_models and embedded as data. Nothing is asserted by hand, and the models are checked against published worked examples wherever one exists.

The passive channeldecks 01–04

What a transmission line is, where the return current flows, what the materials do to the signal, and what happens at the one feature made by drilling.

01

The Transmission Line and the Physical Channel

When a trace stops being a wire, where the fifty-ohm convention comes from, and what a reflection actually is.

Open complete
02

Return Paths and Reference Planes

Every signal current is a loop. Where the other half of it flows, and what happens when the board will not let it.

Open complete
03

Materials, Loss and Causality

Copper roughness, dielectric loss, and why a constant dielectric constant describes a material that cannot exist.

Open complete
04

Vias, Connectors and Discontinuities

The only part of a channel made by drilling, and the one that decides whether the link runs at 28 gigabaud.

Open complete

The signal on itdecks 05–06

Why every fast link is differential, and the one impairment no equaliser can remove.

05

Differential Signalling

Why every fast link is differential, what tight coupling really costs, and how symmetry is lost.

Open complete
06

Crosstalk

The impairment no equaliser can remove, and the one place near-end and far-end coupling genuinely differ.

Open complete

Jitterdecks 07–10

Organised around Ransom Stephens's five rules: it is about the bit error ratio, total jitter can only be measured on a bit error ratio tester, measurement is always a comparison against a reference clock, and timing noise and amplitude noise are not really separable.

07

Total Jitter and the Bit Error Ratio

Why jitter is defined against an error ratio, what a bit error ratio tester does that nothing else can, and the decomposition tree done properly.

Open complete
08

The Dual-Dirac Model and Its Limits

Five assumptions, a fitting parameter that is not the peak-to-peak deterministic jitter, and the tails a measurement cannot reach.

Open complete
09

Clock Recovery, the Reference Clock and Tolerance

Every jitter measurement compares a test clock against a reference. Which reference, how much it tracks, and what the tolerance mask is really testing.

Open complete
10

Crosstalk, Amplitude Noise and the Two-Dimensional View

Timing noise and amplitude noise are not separable, the separation fails above about ten gigabits per second, and crosstalk is where it fails first.

Open complete

Power integritydecks 11–14

The power delivery network as an impedance, as an ecology of resonances, as something that has to be measured in milliohms, and finally as a source of signal-integrity failures.

11

The Power Delivery Network as an Impedance

Target impedance and what the rule is worth, real capacitors, and why the number of parts is set by inductance rather than by capacitance.

Open complete
12

Planes, Cavities and the PDN Ecology

Spreading inductance, cavity resonances, and the Bandini Mountain — the peak the board cannot reach because it is behind the package.

Open complete
13

Measuring Low Impedance

Why a reflection measurement stops at about an ohm, how the two-port shunt-through method reaches a milliohm, and the ground loop that ruins it.

Open complete
14

Power Integrity Meets Signal Integrity

The routes by which a disturbance on the supply becomes an error at a receiver — switching noise, cavity coupling, and supply-induced jitter.

Open complete

The verdictdecks 15–17

Whether the timing closes, whether the measurements can be believed, and how a standard turns all of it into a pass or a fail.

15

Timing, Flight Time and the Budget

Flight time is not propagation delay, and the arithmetic that ended the wide parallel bus.

Open complete
16

Measurement, De-embedding and Correlation

Where S-parameters come from, how they are damaged, and what correlation honestly means.

Open complete
17

Channel Operating Margin and Compliance

How a standard decides a channel is legal, run on the same channel the equalisation deck could not close.

Open complete

What has been checked

A model that agrees only with itself is not worth much. Every cross-check the series makes against an independently published result is listed here, with the disagreement. The last rows, marked internal, are not checks against anybody else: they are places where two different computations in the series have to agree with each other, and the quoted worst disagreement excludes them. The worst is 2.44 per cent.

QuantityThis seriesReference valueDifferenceSource
zdiff w0.15 s0.15102.62102.44+0.18 %Cohn 1955, exact coupled-stripline result
zdiff w0.15 s0.30112.32112.39-0.06 %Cohn 1955, exact coupled-stripline result
zdiff w0.20 s0.2093.18993.282-0.10 %Cohn 1955, exact coupled-stripline result
f rough onset1.348e+091.34e+09+0.59 %Hall & Heck, Advanced Signal Integrity, ch. 5
hammerstad rac ratio1.71441.7284-0.81 %Hall & Heck, Advanced Signal Integrity, ch. 5
huray factor1.95791.95+0.40 %Hall & Heck, Advanced Signal Integrity, ch. 5
huray sphere area um2160.9161-0.06 %Hall & Heck, Advanced Signal Integrity, ch. 5
weave five inch ghz19.51120-2.44 %Hall & Heck, example 7-2
weave ten inch ghz9.755710-2.44 %Hall & Heck, example 7-2
return within 3h0.795170.8-0.60 %Johnson sec 5.2; Hall & Heck eq (5-15)
C6.917e-116.91e-11+0.10 %Johnson & Graham, Advanced Black Magic 2003, sec 3.10
L6.917e-076.91e-07+0.10 %Johnson & Graham, Advanced Black Magic 2003, sec 3.10
critical length m1.9771.97+0.35 %Johnson & Graham, Advanced Black Magic 2003, sec 3.10
f diel4.9889e+084.98e+08+0.18 %Johnson & Graham, Advanced Black Magic 2003, sec 3.10
f lc9.5873e+069.58e+06+0.08 %Johnson & Graham, Advanced Black Magic 2003, sec 3.10
f skin2.7152e+072.71e+07+0.19 %Johnson & Graham, Advanced Black Magic 2003, sec 3.10
f wg1.423e+111.42e+11+0.21 %Johnson & Graham, Advanced Black Magic 2003, sec 3.10
r ac f076.74276.74+0.00 %Johnson & Graham, Advanced Black Magic 2003, sec 3.10
r dc12.64512.64+0.04 %Johnson & Graham, Advanced Black Magic 2003, sec 3.10
v01.4457e+081.4457e+08+0.00 %Johnson & Graham, Advanced Black Magic 2003, sec 3.10
droop vs zpeak23.24124.876-6.57 %internal: deepest transient droop per amp against the peak of the impedance profile (time domain vs frequency domain)

Long-form companion

The same material as a written report: Signal_Integrity.pdf. It carries the continuous argument where the decks carry the interactive models, and it is generated from the same computations, so a number cannot differ between the two.

How to read the series

Most decks are worked against one channel — the 28.8 inch backplane characterised in Equalisation in High-Speed Serial Links — so the numbers in one deck can be set against the numbers in another.

Related material

RepositoryHow it relates
Equalisation in High-Speed Serial LinksThe worked channel this series keeps returning to, taken from S-parameters to a closed link budget
Matrix Methods in Network ParametersThe S-, Z- and Y-parameter algebra behind every cascade here
Matrix Concepts in Digital FiltersThe optimal-tap theory behind every equaliser
Kramers–Kronig RelationsThe causality constraint decks 03 and 16 both lean on
High-Speed Serial Links — interview preparationThe written companion: notes and worked problems on the same ground
LPDDRx Layout — interview preparationThe parallel-bus side of deck 15
Modern SoC DesignThe silicon side: its deck 04 on SerDes, 09 on power delivery, 13 on clocks
HardwareThe index this series sits in