Signal Integrity — Power Integrity, Deck 14 of 17

Power Integrity Meets Signal Integrity

Four routes by which a disturbance on a supply rail becomes an error at a receiver — and the observation that two of the four are not power problems at all but return-path problems wearing a different hat.

SSNPSRR supply-induced jitter DC blockingcavity coupling
$di/dt$ → rail noise → PSRR, loop → jitter → the eye
01 Transmission lines02 Return paths03 Materials and loss04 Vias05 Differential pairs06 Crosstalk07 Total jitter08 Dual-Dirac09 Clock recovery10 Amplitude noise11 PDN impedance12 Planes and ecology13 Measuring milliohms14 PI meets SI15 Timing budgets16 Measurement17 COM and compliance
00

Topics We'll Cover

01

Four Routes From the Rail to the Eye

Power integrity earns its place in a signal-integrity series only through the routes by which it damages a signal. There are four worth separating, and they are not equally famous.

One: through the transmitter

Rail noise modulates the output stage's supply and therefore its swing and its threshold, producing amplitude noise directly — which deck 10 showed is also jitter, through the slew rate.

Two: through the oscillator

Rail noise reaches the phase-locked loop's control node and modulates its frequency, which integrates to phase and appears as jitter. This is the best-known route and the subject of slides 03 and 04.

Three: through the return path

A signal that changes reference plane needs its return current to cross between two planes, which means through the power delivery network. The network's impedance is therefore in series with the signal. Slides 05 and 06.

Four: through the cavity

Every via passing through a plane pair couples into it, and the pair is a shared resonant medium. What one signal injects, another picks up. Slide 07.

The third and fourth are the ones most often missed, and they are not really power problems. They are the return-path argument of deck 02 restated: the power delivery network is the return path whenever a signal changes reference, so its impedance becomes a signal-integrity parameter whether or not anyone intended it to.

02

Simultaneous Switching Noise

When many drivers switch at once their currents all flow through whatever inductance the supply and return paths share, and the voltage that develops across it is $L$ times the total rate of change. The scaling with driver count is what makes this an interface problem rather than a component one.

supply disturbance

The strongest unlisted argument for differential

A differential pair draws a constant current from the supply whichever way it is driven, because one leg sources exactly what the other sinks. Its contribution to this sum is therefore close to zero. Deck 05 listed the benefits of differential signalling and this one rarely appears on such lists; on a wide interface it is frequently the largest of them.

03

Interactive: Supply Ripple Becoming Jitter

A tone on the supply reaches the oscillator's control node attenuated by whatever rejection exists, and modulates its frequency. Frequency modulation integrates to phase modulation, so the phase deviation is the frequency deviation divided by the modulation frequency — and the jitter is that phase divided by the carrier's angular frequency.

The loop then filters. Against a disturbance injected at the oscillator its error response is high-pass, and how steeply it rises decides the whole answer: a first-order loop rejects in proportion to frequency, a second-order loop in proportion to frequency squared. Since the modulation index is already falling as the reciprocal of frequency, the first-order loop's rising rejection cancels it exactly and the jitter is flat from the lowest frequencies up to the loop bandwidth. Only in the second-order case does the square win, and only then is there a genuine worst frequency.

Both are plotted, because the familiar rule — that the dangerous tone is the one near the loop bandwidth — is a statement about second-order loops and is simply false for a first-order one. Real synthesis and clock-recovery loops are type II, so the rule survives; but it survives for a reason worth knowing, and the flat curve is what shows it.

second-order loop (type II) first-order loop, for contrast loop bandwidth

04

Where the Regulator's Switching Frequency Should Sit

A switching regulator puts a large, narrow, entirely predictable tone on the rail at its switching frequency. The previous slide says what that tone becomes, and therefore gives a design rule that is easy to state and routinely ignored: the regulator's frequency should be chosen against the transceiver's loop bandwidth, not against efficiency alone.

Well below the loop bandwidth

The loop tracks and corrects it, and the correction improves faster than the modulation index grows, so the jitter falls away at twenty decibels per decade below the natural frequency. A hundred-kilohertz regulator under a four-megahertz loop is thirty decibels better placed than a four-megahertz one, which is why low-frequency regulators were never a jitter problem.

At it

The worst place, and where modern multi-megahertz regulators land by default. The response is symmetric about the loop's natural frequency — twenty decibels per decade up on one side, twenty down on the other — so “just above” and “just below” are equally bad and the peak itself sits at the bandwidth, not beyond it.

Far above it

Also acceptable: the phase deviation falls inversely with the modulation frequency even though the loop does nothing. Very high switching frequencies are benign for this reason, whatever else they cost.

And spread spectrum

Deliberately modulating the switching frequency smears the tone across a band. That reduces the peak and leaves the total energy where it was, which helps an emissions measurement and helps a jitter budget rather less than is usually assumed.

05

A Signal That Changes Reference Plane, Seen as a PI Problem

Deck 02 treated this as a return-path question and priced it as a loop inductance. Smith and Bogatin treat the same configuration as a power-integrity question, and the change of view is worth adopting because it explains the remedy.

When a signal via carries a trace from a layer referenced to ground to one referenced to a supply, the return current has to cross from one plane to the other. The only route is the cavity between them, so the cavity's impedance appears in series with the signal. Everything deck 12 established about that impedance — that it resonates, that it depends on where you probe, that its peaks are tall — is therefore a signal-integrity property.

Why the peaks matter here

At a cavity resonance the impedance the return current sees is at its highest, so the signal suffers the largest series discontinuity at exactly the frequencies where the plane pair rings. A transition that is acceptable at most frequencies can be severe at a few.

And what it implies for stackups

That the cheapest fix is to not do it: plan the layer transitions so that a high-speed net either keeps its reference or changes between two planes of the same net, which needs only a stitching via. This is a stackup decision made before routing, and it cannot be retrofitted.

06

Interactive: How Many DC Blocking Capacitors

Where the transition is unavoidable, the return current crosses through capacitors placed between the two planes. The question is how many, and it has the same answer as the one in deck 11: above their resonances, capacitors present mounting inductance, so the count is set by inductance rather than by capacitance.

impedance in series with the signal at 1 GHz

Two jobs, two counts

Blocking capacitors placed between planes do two different things, and the number needed is not the same for each. Carrying the return current of a particular transition needs a capacitor close to that transition. Damping the cavity's resonances needs capacitors distributed across the plane pair, in a number set by the cavity rather than by any one signal. A design that provides for one and not the other usually discovers it in an emissions chamber.

07

The Cavity as a Shared Medium

The fourth route is the least intuitive. A plane pair is a two-dimensional waveguide shared by everything that penetrates it. A via injecting energy into it does not deliver that energy to a particular destination; it excites the cavity's modes, and every other via in the same cavity is coupled to those modes.

That makes the plane pair a crosstalk mechanism with a quite different character from the one in deck 06. Trace-to-trace coupling falls off with separation; cavity coupling does not, because a resonant mode fills the whole cavity. Two vias at opposite corners of a board are coupled through a mode that spans it, and moving them apart does not help.

Damping helps

Lowering the quality factor of the modes reduces the coupling at every location simultaneously, which spacing cannot do. Distributed capacitors and deliberately lossy planes both work.

Thin dielectric helps

Closer planes lower the cavity's impedance in proportion, so the same injected current produces less voltage. The same lever as the spreading inductance of deck 12.

Splitting helps, carefully

A separate cavity for a sensitive rail keeps its modes to itself. It also creates the plane discontinuities of deck 02, so it trades one mechanism for another and has to be planned rather than improvised.

08

The Budget, Joined Up

The four routes deliver their damage into budgets the earlier decks already built, and it is worth being explicit about which entry each one lands in, because the commonest error is to count a disturbance twice.

RouteArrives asEnters which budgetComputed where
Through the transmitterAmplitude modulation of the swingThe voltage noise term, and its jitter equivalent through the slew rateDeck 10, slides 02 and 03
Through the oscillatorPeriodic jitter at the ripple frequencyThe deterministic jitter term, boundedSlide 03 of this deck
Through the return pathA series impedance at the transitionInsertion loss and reflection — the channel itselfDeck 02, deck 12
Through the cavityCrosstalk uncorrelated with the victimBounded uncorrelated jitter, and the crosstalk varianceDeck 07, deck 10

Note that only the second is a jitter term by origin. The first becomes one through the slew rate, the third is not a noise term at all but a change to the channel, and the fourth is crosstalk that happens to have arrived by an unusual route. Deck 17's compliance calculation sees all four, but it sees them in three different places.

Which is why this deck exists

A power-integrity analysis that stops at an impedance profile has not said whether the link works, and a signal-integrity analysis that treats the supply as ideal has not said whether the channel is the one it modelled. The two meet at precisely these four places and nowhere else, which makes the list short enough to check.

09

Cheat Sheet

MechanismExpressionWorth remembering
Simultaneous switching noise$L\,N\,\Delta I / t_r$Linear in driver count; near zero for differential
Supply to jitter$\Delta\phi = K_{\mathrm{VCO}}V_n/f_m$Filtered by the loop below its bandwidth
Worst tone frequencyAt the loop bandwidth, for a type-II loop; nowhere in particular for a type-I onePlace the regulator's frequency deliberately, and state the loop order before quoting the rule
Reference-plane changeCavity impedance in seriesA PI property that is a SI parameter
DC blocking capacitors$Z \to \omega L_{\text{mount}}/N$Two jobs, two different counts
Cavity couplingModal, not localDistance does not help; damping does
Double counting—Four routes, three budget entries; count each once