Switching light without converting it: packet against circuit switching, MEMS, silicon-photonic and wavelength-routed switches, Google's optical spine and TPU v4 interconnect, reconfiguration time against traffic, and what an optical switch costs in the link budget.
Concepts used here, and where they are explained. Each links to a glossary entry: this series glossary, the Silicon Photonics Fundamentals glossary for device physics, or the glossaries of other sister series for concepts they already explain.
| Technology | Example | Ports | Reported loss and speed | Source |
|---|---|---|---|---|
| 3D MEMS mirrors | Google Palomar | 136 × 136 | Typically under 2 dB; milliseconds | Liu et al. 2023; Urata et al. 2022 (slide 02) |
| 3D MEMS mirrors | Calient S320 | 320 ports, 7 RU | 1.8 dB typical; 45 W typical; under 50 ms per port | Calient (datasheet; vendor) |
| MEMS | Lumentum R300 (2025) | 300 × 300 | Sampling with hyperscalers, general availability planned for the second half of 2025; the vendor claims more than 65% lower network power | Lumentum (press release; vendor) |
| Beam steering | HUBER+SUHNER POLATIS 576 | 576 × 576, 8 RU | Not stated in the material found | HUBER+SUHNER (product page; vendor) |
| Digital liquid crystal | Coherent (OFC 2024) | 300 × 300 | Drive voltage below 10 V; loss and speed not stated in the release | Coherent (press release; vendor) |
| Silicon photonic MEMS | Seok et al., wafer-scale | 240 × 240 (3 × 3 stitched 80 × 80 blocks, 4 × 4 cm) | Up to 9.8 dB on chip; switching below 400 ns; 70 dB on/off ratio | Optica 6, 490, 2019 |
| Tunable lasers and passive gratings | Sirius (Microsoft Research) | Wavelength-routed | Lasers tune in under 912 ps; 3.84 ns end-to-end reconfiguration on 50 Gb/s channels | Ballani et al. (ACM SIGCOMM 2020) |
| Robotic patch panel | Telescent G5 | 16,128 fibres in a rack | Reconfigures by physically moving fibres | Telescent (press release; vendor) |
Jouppi et al. describe a 4,096-chip TPU v4 machine whose chip-to-chip interconnect runs through optical circuit switches (ISCA 2023; arXiv:2304.01433).
| What the paper reports | Value |
|---|---|
| Building block | A 4 × 4 × 4 cube of 64 chips with its 16 CPU hosts, one rack |
| OCSes and their optical components | Less than 5% of system cost and less than 3% of system power |
| Switch technology | 3D MEMS mirrors that switch in milliseconds |
| Twisted tori (all-to-all throughput against a regular torus) | 1.63× for 4 × 4 × 8 slices, 1.31× for 4 × 8 × 8 |
| Availability | The OCSes let the machine tolerate 1,000 CPU hosts that are each unavailable 0.1–1.0% of the time; without them, hosts would need 99.9% availability for reasonable goodput, against 99.0–99.5% with them |
Two questions about putting an OCS in a network. How often can it reconfigure? The fabric carries traffic for the fraction 1 − treconfigure/tperiod of the time. What does it save? Replacing a packet spine of N ports removes a switch port and a transceiver per spine port and adds the OCS's own power. Presets set the reconfiguration time from the sources of slide 03 (MEMS: Calient's under 50 ms per port, vendor; silicon photonic MEMS: under 400 ns; tunable lasers: 3.84 ns). The OCS's 0.8 W per port is Palomar's 108 W over 136 ports, and the transceiver's 17 W an 800G datasheet maximum (deck 01). The packet-switch power per port is illustrative.
Limits: the dark time assumes all circuits reconfigure together and carry nothing meanwhile; real systems drain traffic first and reconfigure part of the fabric at a time. The power comparison counts only the spine layer, not the aggregation blocks either side, and ignores the cost of circulators and of transceivers that tolerate the OCS's extra loss.