Silicon Photonics Fundamentals — Presentation 03

Lasers, Packaging and the Energy-per-Bit Budget

Why silicon borrows its laser and the four ways to bring one; external laser modules, wall-plug efficiency and comb sources; fibre attach and packaging; putting electronics next to photonics; and the link budget from laser to detector, priced in picojoules per bit, with what published links actually report.

Laser integration ELSFP Wall-plug efficiency Packaging Link budget pJ/bit
Wall plug → Laser → Losses → Receiver sensitivity → pJ/bit
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Topics We'll Cover

Concepts used here, and where they are explained. Each links to a glossary entry: this series glossary, or the glossaries of Fourier Optics for Inference, Compute in Transit, LLM Inference Simulators and FHE Accelerator Simulators for concepts those series already explain.

01

Why Silicon Needs Someone Else's Laser

Silicon has an indirect bandgap: the lowest state of its conduction band and the highest state of its valence band sit at different crystal momenta. An electron and a hole can only recombine and emit a photon with the help of a phonon to carry the momentum difference, so radiative recombination is slow and loses out to non-radiative paths. Silicon makes poor light emitters and no practical electrically pumped laser. III–V semiconductors (InP, GaAs and their alloys) have direct gaps and make the lasers of every optical link.

The consequence

  • A silicon photonic chip is a modulator-and-detector chip: the light comes from a III–V device, attached, bonded, grown or fibred in (slide 02).
  • The laser is often the least reliable and most temperature-sensitive part of the link, which pushes it away from hot electronics (slide 03).

The opportunity

  • Keeping the laser separate lets one source feed many modulators, or many wavelengths (slide 05).
  • Every dB lost between laser and detector is paid in laser power at the wall, divided by the laser's efficiency: the thread through the rest of this deck.

Reviews: Liang and Bowers, “Recent progress in lasers on silicon” (Nature Photon. 4, 511, 2010); Komljenovic et al., “Heterogeneous silicon photonic integrated circuits” (J. Lightwave Technol. 34(1), 20, 2016).

02

Four Ways to Bring the Laser

ApproachHowStrengthsCostsExample
External sourceA packaged laser elsewhere, fibred to the chip's input couplersReplaceable, cool, mature lasers; one source can feed many channelsAn extra fibre coupling (loss) and a polarisation-maintaining pathOIF ELSFP (slide 03)
Attached dieA finished III–V laser chip flip-chipped, butted or micro-transfer-printed onto the silicon chipKnown-good lasers, tested before attachmentSub-micrometre alignment per laser; heat goes into the photonic chipMicro-transfer printing of III–V devices onto silicon PICs, reviewed by Zhang et al. (APL Photonics 4, 110803, 2019)
HeterogeneousUnpatterned III–V bonded onto patterned silicon, then processed; light couples evanescently into the silicon guideLithographic alignment; many lasers per waferIII–V processing in a silicon lineFang et al.'s hybrid AlGaInAs–silicon evanescent laser (Opt. Express 14, 9203, 2006): continuous-wave at 1577 nm, 65 mA threshold at 15 °C, 1.8 mW out, up to 40 °C (as summarised in Proc. SPIE 6485, 648515, 2007)
MonolithicIII–V grown directly on siliconWafer-scale, no bondingLattice mismatch makes defects; quantum dots tolerate them betterChen et al.'s InAs/GaAs quantum-dot laser on silicon (Nature Photon. 10, 307, 2016): 62.5 A/cm2 threshold, over 105 mW, operation to 120 °C, and an extrapolated mean time to failure above 100,158 h from 3,100 h of ageing
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External Lasers and the ELSFP

front panel ELSFP laser ELSFP laser package substrate switch ASIC optics optics laser light (fibre)data (fibre)
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Wall-Plug Efficiency

Wall-plug efficiency (WPE) is optical power out over electrical power in. It converts every optical decibel in a link into electrical watts: the laser's electrical power is Poptical/WPE, and each 3 dB of extra loss doubles it.

FigureWhat it isSource
Up to 13%Measured WPE of a short-cavity III–V-on-silicon C-band DFB laser (200 µm) at 20 °C, coupling up to 2 × 6 mW into the silicon waveguideRahimi Vaskasi et al. (Proc. SPIE 12006, 120060H, 2022)
35% × 41% = 14.35%A DFB pump's WPE times a Kerr comb's conversion efficiency, assumed for a comb-driven transmitterRizzo et al. (arXiv:2109.10297)
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Multi-Wavelength Sources

A WDM link needs one carrier per wavelength. Three ways to provide them:

Laser arrays

One DFB per wavelength, each held on its grid slot by its own temperature or current. Simple and powerful, but the count of lasers, and of things that fail, grows with the channel count.

Mode-locked comb lasers

One laser emits many equally spaced lines. Liu et al.'s quantum-dot mode-locked laser grown on silicon gave 58 lines within 3 dB at 20 GHz spacing and carried 4.1 Tbit/s as 64 channels of 32 GBd PAM4, with an external optical amplifier (Optica 6, 128, 2019).

Kerr microcombs

A CW pump in a high-Q microresonator generates a comb by four-wave mixing. Rizzo et al. drove a silicon photonic link with one: 32 wavelengths at 16 Gb/s each, 512 Gb/s, with bit error ratios below 10−12 (Nature Photon. 17, 781, 2023).

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Fibre Attach and Packaging

package substrate photonic chip (PIC) electronic chip fibre array flip-chip bumps: short, low-capacitance links V-groove block, aligned <1 µm heat from both chips leaves through the substrate
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Putting Electronics Next to Photonics

IntegrationHowExample
Monolithic, “zero-change”Photonic devices drawn in an unmodified CMOS SOI process, beside the transistorsSun et al.: a microprocessor with more than 70 million transistors and 850 photonic components on one 45 nm SOI CMOS chip, communicating directly by light (Nature 528, 534, 2015); Stojanović et al. on 45 nm and 32 nm SOI platforms (Opt. Express 26, 13106, 2018)
Monolithic, photonics-enabled CMOSA CMOS process modified to include optimised photonic layersGlobalFoundries' 45 nm 45CLO platform, Rakowski et al. (OFC 2020, paper T3H.3)
3-DA separate electronic chip bonded face-to-face onto the photonic chip, with dense short connectionsDaudlin et al.: 80 channels at 10 Gb/s, 800 Gb/s, at 120 fJ/bit (arXiv:2310.01615; Nature Photonics, 2025)
2.5-D and side by sideElectronic and photonic chips on an interposer or substrate, or wire-bondedCommon in pluggable modules and co-packaged engines
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The Optical Link Budget

laser power− laser-to-chip coupling− modulator loss− mux− chip-to-fibre− fibre + connectors− fibre-to-chip− demux≥ sensitivity + margin
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Interactive: Link Budget and Energy per Bit

A link computed from laser to detector and priced per bit. Every default here is illustrative, chosen to look like the two kinds of link described in this series, not taken from any product; change them to match a datasheet. Fibre couplers means chip-to-fibre and fibre-to-chip together; the laser can be one per lane or one source split (or a comb shared) across all lanes; SerDes + DSP covers serialisers, clocking and any DSP. Fibre attenuation is Corning's 0.32 dB/km at 1310 nm, PAM4 adds 10·log103 dB to the required OMA, and the slide 08 relation converts OMA to average power.

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5.0
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Aggregate rate
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Total optical loss
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Laser output per lane
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Total link power
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Energy per bit
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Limits: one direction of one link; no FEC overhead; laser power is the average power needed at the receiver multiplied up by the losses, ignoring the modulator's extra penalty at its operating point (set a lower extinction ratio to include it) and the weakest-line penalty of a comb. Electronics energies are lumped per bit. A link described in a paper or a datasheet may include a different set of these terms (slide 10).

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What Published Links Report

Energy-per-bit figures are easy to quote and hard to compare: each counts a different set of terms. Read what is included before reading the number.

ResultEnergyWhat it coversSource
3-D integrated link, 80 × 10 Gb/s120 fJ/bitThe authors' headline figure for the whole 3-D bonded link; see the paper for what it includesDaudlin et al. (arXiv:2310.01615)
100 Gb/s OOK transmitter2.03 pJ/bitThe 28 nm CMOS driver aloneLi et al. (Optica 7, 1514, 2020)
Ring modulator0.9 fJ/bitThe modulator's switching energy at 25 Gb/s, 0.5 VppTimurdogan et al. (Nature Commun. 5, 4008, 2014)
GeSi electro-absorption modulator12.8 fJ/bit plus about 1.2 mW staticThe modulator at 56 Gb/sSrinivasan et al. (J. Lightwave Technol. 34, 419, 2016)
Photonic link module (QSFP56)2.76 pJ/bitThe module developer's estimate for its 45 nm silicon photonics, excluding the laserAs summarised in Compute in Transit's glossary (arXiv:2608.21536)
Device targetAbout 10 fJ/bitMiller's target for the optical output device in optical interconnects to chipsMiller (Proc. IEEE 97, 1166, 2009)
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Thermal Tuning in the Budget

Rings must be held on their wavelengths (deck 02, slide 08), and heaters draw power whether or not data flows. Per bit, a heater costs its power divided by the lane's data rate.

Heater power per ringAt 10 Gb/sAt 25 Gb/sAt 50 Gb/s
0.5 mW50 fJ/bit20 fJ/bit10 fJ/bit
2 mW200 fJ/bit80 fJ/bit40 fJ/bit
5 mW500 fJ/bit200 fJ/bit100 fJ/bit

Arithmetic: mW ÷ Gb/s = pJ/bit. Heater powers are illustrative; measured heaters need 12.7–24.77 mW for a full π (deck 02, slide 08), and a ring needs a fraction of that depending on its offset.

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How Bandwidth Scales

bandwidth = fibres × wavelengths per fibre × bits per symbol × symbol rate

ExampleFibresWavelengthsBits/symbolSymbol rateSource
400GBASE-DR44 (each way)12 (PAM4)53.125 GBdIEEE 802.3bs
400GBASE-FR8 / LR81 (each way)82 (PAM4)50 Gb/s per wavelengthIEEE 802.3bs
200 Gb/s per lane Ethernet200 Gb/s per lane for 800 Gb/s and 1.6 Tb/s Ethernet; a draft standard in ballot at the time of writingIEEE P802.3dj
Kerr-comb link1321 (NRZ)16 Gb/sRizzo et al. 2023 (slide 05)
3-D integrated link80 channels at 10 Gb/sDaudlin et al. (slide 07)
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What to Take Away