Pluggable Transceivers to Linear-Drive Optics

Topics We'll Cover

• What a Pluggable Module Is
• Inside a DSP-Retimed Module
• The Optical Interfaces: 400G to 1.6T
• The Host Electrical Interface
• Where a Module's Power Goes
• Linear-Drive Pluggable Optics (LPO)
• Linear Receive: the Half-Way House
• Interactive: Module Power by Architecture
• What Linear Drive Gives Up
• The Reach Ladder: Copper, Multimode, Single-Mode
• Faceplates, Heat and the Switch
• What to Take Away

What a Pluggable Module Is

A pluggable transceiver is a self-contained optical link end that slides into a cage on a switch or network-card faceplate: electrical lanes on one side, fibre on the other. The switch maker and the optics maker agree only on the cage, the connector, the management interface and the power envelope, written down in a multi-source agreement (MSA). That separation is why pluggables won: optics can be chosen per port, replaced when they fail, and bought from many suppliers.

• Power envelopes grew with each generation, because each doubling of lane rate made the electronics inside work harder. Power, and the heat the faceplate can remove, is the thread of this deck.
• The devices inside, modulators, photodiodes, lasers and their packaging, are explained in Silicon Photonics Fundamentals and linked from the concept chips above rather than repeated here.

Inside a DSP-Retimed Module

• The DSP splits one hard link into two easier ones. It recovers the clock and data from the lossy host trace, then drives the optics with a clean, re-timed signal; on the receive side it equalises what the photodiode and TIA deliver before driving the host trace again. Each half is specified, tested and debugged on its own.
• Transmit optics are an electro-absorption modulated laser (EML), a directly modulated laser, or a continuous-wave laser with a silicon Mach–Zehnder modulator (MZM); receive is a photodiode and a transimpedance amplifier (TIA).
• PAM4 at 100 Gb/s per lane and above (PAM4) made the DSP necessary: four-level eyes are a third the height of NRZ ones and need equalisation that analogue circuits alone struggle to deliver across every host board and fibre.

The Optical Interfaces: 400G to 1.6T

• Names encode the build: SR is multimode, DR is parallel single-mode for 500 m, FR and LR are wavelength-multiplexed single-mode for 2 and 10 km, and the trailing number is the count of lanes or wavelengths. The wavelength plans are the CWDM and LAN-WDM grids of OptSiP 01.
• Parallel fibre against wavelengths: DR modules need one laser wavelength and no multiplexer but eight or sixteen fibres; FR and LR modules need multiplexers and several laser wavelengths but only two fibres. Inside a cluster hall, where many links fit within 500 m, DR is the natural fit (deck 04).

The Host Electrical Interface

Between the switch chip's SerDes and the module sits the host channel: package, board trace, connector and the module's own short trace. OIF specifies it so that any host and any module interoperate.

• 16 dB is a lot. At about 26.6 GHz (the Nyquist frequency of 106.25 Gb/s PAM4) board traces lose more per centimetre as frequency rises, so the switch SerDes and the module DSP each carry substantial equalisation: the CTLE, FFE and DFE of the Equalisation in High-Speed Serial Links deck.
• Each doubling of lane rate doubles the Nyquist frequency and raises loss per centimetre, so at 200 Gb/s per lane the faceplate is a harder place to reach from a large switch package. That pressure drives both linear drive (this deck) and co-packaged optics (deck 02).

Where a Module's Power Goes

• Per bit: 17 W at 800 Gb/s is about 21 pJ/bit; 11 W is about 14 pJ/bit. The silicon photonic links of OptSiP 03 report from femtojoules for a modulator to a few picojoules for a whole link: the difference is mostly DSP, host-facing electronics and lasers.
• Per switch: a 51.2 Tb/s switch carries 64 × 800G ports (slide 11); at 17 W each its optics may draw up to 1,088 W.
• The DSP is the target. Laser, driver and TIA power scale with the optics; the DSP's power scales with the digital work of equalisation and clock recovery on both sides, and removing it is the idea behind linear drive.

Linear-Drive Pluggable Optics (LPO)

• The idea: remove the module DSP and let the switch's own SerDes, which must already equalise the host trace, equalise the optics and fibre too. The driver and TIA become linear amplifiers that pass the waveform through without re-timing it.
• The LPO MSA was formed on 21 March 2024 by twelve companies (Accelink, AMD, Arista, Broadcom, Cisco, Eoptolink, Hisense, Innolight, Intel, MACOM, NVIDIA, Semtech) (press release), and on 25 March 2025 released its first specification: 100 Gb/s-per-lane single-mode modules for 100G to 800G Ethernet, with optical and electrical requirements for the switch, the network card and the module, by then with more than 50 member companies (press release).
• What vendors claim it saves: Adtran puts first-generation 800G LPO at 5–8 W against well over 10 W for DSP-based modules (Gazettabyte); Semtech puts retimed 800G at 12–16 W and LPO at 4–8 W (Semtech blog). Both are vendor claims; no peer-reviewed measurement was found for this deck.

Linear Receive: the Half-Way House

• How much LRO saves: Juniper's optics guide calls LRO a compromise with “roughly half the power and cost savings compared to LPO” (Juniper). Semtech's figures for 200 Gb/s-per-lane modules are about 23–25 W retimed, about 16 W LRO and about 10 W LPO (Semtech blog; vendor claims).
• Why transmit is the half to keep: a retimed transmitter launches a standard optical signal that any receiver can be tested against, so the optical link stays interoperable while the receive side, which faces only one host, goes linear. No IEEE or OIF definition of LRO was found; the LPO MSA lists it as future work.

Interactive: Module Power by Architecture

One module's power split into DSP, optics (lasers, drivers, TIAs) and everything else (controller, power conversion), for the three architectures, scaled up to a switch. Every default is illustrative, chosen to sit inside the vendor ranges of slides 05 and 06 (a DSP module near 11 W, an LPO module in the 5–8 W range); change them to match a datasheet. The model takes LRO as keeping half the DSP, and charges linear drive an extra amount of host SerDes power for driving an unretimed channel.

Limits: a static power split with no dependence on reach, temperature or lane rate; the host SerDes term stands for whatever extra equalisation or drive the switch must provide, which the vendor figures above do not separate out. Energy per bit is module power divided by its rate.

What Linear Drive Gives Up

• A split link. With a DSP, the host side and the optical side are separate links with separate specifications. Without one, the switch SerDes, package, board, connector, module, fibre and far-end receiver form one analogue channel, and every combination of switch and module must be qualified together. The LPO MSA exists to specify the host side as well as the module for exactly this reason (slide 06).
• Margin. Noise and distortion from the host trace and the optics add instead of being reset in the middle. Reach and fibre types are narrower: the LPO MSA's first specification covers single-mode modules at 100 Gb/s per lane.
• Diagnostics. A DSP sees both sides of the link and reports signal quality; a linear module sees little, which makes faults harder to localise in a large fabric (deck 04 on link failures).
• The next lane rate. IEEE P802.3dj's 200 Gb/s-per-lane optical interfaces are specified as retimed links (slide 03); whether linear drive extends to 200 Gb/s per lane depends on host SerDes and channel quality, and LRO is one answer.

The Reach Ladder: Copper, Multimode, Single-Mode

• Copper's reach halves as the lane rate doubles, on these objectives: that is the force pushing optics ever closer to the chips, inside racks and eventually inside packages.
• Copper is passive and almost free in power and failures; optics costs watts and lasers but goes further. NVIDIA's rack-scale NVLink domain is built on copper for this reason (deck 04).

Faceplates, Heat and the Switch

• Faceplate arithmetic. A 51.2 Tb/s switch with 64 × 800G OSFP ports fills two rack units (Arista 7060X6-64PE, datasheet). At 102.4 Tb/s the same faceplate needs 1.6T modules, or twice the ports.
• Heat. Each module's heat must leave through the faceplate airflow (OSFP's integrated heat sink was designed for this, slide 01), while the switch chip's heat leaves through its own heat sink. Every watt saved in a module is a watt the faceplate no longer has to remove.
• The electrical reach. From a large switch package to 64 faceplate cages is many centimetres of board trace at 26.6 GHz Nyquist or more (slide 04). Co-packaged optics removes that trace altogether (deck 02).

What to Take Away

• Pluggables won through separation: an MSA-defined cage, connector and power envelope let switch and optics makers work independently and let operators replace optics per port.
• The DSP splits the link into a host electrical half (OIF CEI-112G-VSR: up to 16 dB at Nyquist) and an optical half (IEEE 802.3 and MSA interfaces), at a cost of several watts per module: 800G datasheets and vendor claims put modules between about 11 and 17 W, 14 to 21 pJ/bit.
• LPO removes the DSP and makes the switch SerDes equalise the whole link; vendors claim roughly half the module power. LRO keeps the transmit retimer for interoperability and saves about half as much.
• The price is a link specified end to end, with less margin and fewer diagnostics; the LPO MSA (2024–2025) is the industry's attempt to specify it.
• Copper's reach halves with each lane-rate doubling (at least 2 m at 100 Gb/s, an objective of at least 1 m at 200 Gb/s), pushing optics towards the chip.
• Next: deck 02 puts the optics in the package.