Interactive slide decks covering Arm's Advanced Microcontroller Bus Architecture — from the 1996 release of AMBA 1 through the AXI workhorse, ACE and CHI coherency, and what comes next for chiplets, confidential compute, and AI accelerators. Designed as interview preparation for SoC and silicon engineers. Click any presentation below to launch it.
AMBA 1 (ASB/APB) · AMBA 2 (AHB) · AMBA 3 (AXI/ATB) · AMBA 4 (AXI4/ACE/QoS) · AMBA 5 (CHI/AXI5/AHB5) · CHI-C2C for chiplets
AHB phases · HREADY backpressure · Bursts · AHB-Lite · AHB5 · Multi-layer AHB · APB2/3/4/5 · PSLVERR · PPROT · PWAKEUP
5 channels · VALID/READY handshake · FIXED/INCR/WRAP bursts · IDs · Out-of-order · Exclusive access · QoS · AXI4-Lite · AXI4-Stream
AC/CR/CD snoop channels · UniqueClean / UniqueDirty / SharedClean / SharedDirty / Invalid · ReadShared · DVM · CCI-400/500/550
Packet-based protocol · REQ/RSP/SNP/DAT · RN-F/HN-F/SN-F nodes · Home snoops · DMT/DCT · Mesh topologies · CMN-600/650/700
CHI-C2C over UCIe · MPAM · Realm Management Extension · CXL.mem coexistence · NPU / HBM paths · AMBA-over-PCIe · Formal verification