Interactive slide decks on the system IP around Arm CPUs — the Generic Interrupt Controller, System MMU, DynamIQ Shared Unit, and MPAM / CoreSight debug fabric. What turns a core into a system. Designed for SoC, kernel, hypervisor, and firmware engineers who work above the core and below the OS. Click any presentation below to launch it.
GICv1 / v2 / v3 / v4 · GIC-400 / 500 / 600 / 700 · Distributor + Redistributors · SPI / PPI / SGI / LPI · ITS for MSI · vGIC
SMMU-v2 vs v3 · SMMU-600 / 700 · Stream tables · Context descriptors · Stage 1 + 2 · ATS / PASID / PRI · IORT
big.LITTLE → DSU · shared L3 slicing · SCU · 1+3+4 layouts · per-core DVFS · CHI egress to CMN · DSU-120AE
MPAM v1 · PartID-tagged transactions · Linux resctrl · CoreSight DAP / ETM / ITM / CTI · TMC · Class-0/1 discovery · OpenOCD