Transformer Training — Presentation 11

Model Parallelism

When one device cannot hold the model, cut it up: layer by layer (a pipeline, with its bubble), inside each layer (tensor parallelism), along the sequence, or among experts. A live pipeline simulation, 3-D and 4-D layouts, and a systems model checked against published runs.

Pipeline GPipe / 1F1B Interleaving Tensor parallel Sequence / context parallel Expert parallel MFU validation
Pipeline (p) → Tensor (t) → Context (cp) → Data (d)
00

Topics We’ll Cover

Live companion and sources

This deck follows chapter 12, parallelism II: model, with a pipeline animation and a layout explorer. Numbers: results.md §11a and §12 (the site’s training-systems model and its discrete-event pipeline simulation).

01

When the Model Does Not Fit

Data parallelism gives every device the whole model. When the model is too big for one device (deck 09), it has to be cut up:

Across layers: pipeline (p)

Each device holds a contiguous block of layers; activations flow forward from device to device and gradients flow back.

Inside layers: tensor (t)

Each layer’s matrices are split across devices, which combine partial results with collectives.

Along the sequence: sequence / context (cp)

Activations, and for long contexts attention itself, are split by position.

Among experts: expert (ep)

A mixture-of-experts model puts different experts on different devices.

02

Pipeline Parallelism and the Bubble

Give each of \(p\) devices a quarter (say) of the layers. One batch at a time would leave all but one device idle, so the batch is cut into \(m\) micro-batches that follow each other through the stages. At the start and end of each step the pipeline fills and drains; those idle slots are the bubble.

$$T = \Big(m + \tfrac{p-1}{v}\Big)(t_f + t_b), \qquad \text{bubble} = \frac{p-1}{v\,m}$$

GPipe

Every micro-batch forward, then every one backward (Huang et al. 2019). Each device must hold all \(m\) micro-batches’ activations.

1F1B

One forward, one backward: once the pipeline is full, each device alternates. The same bubble, but a device holds at most \(p\) micro-batches’ activations (Narayanan et al. 2021, §2.2).

03

A Pipeline, Simulated

A discrete-event simulation of every forward (1 time unit) and backward (2 units) on every device, each waiting for its inputs. Choose the schedule and sizes; the idle time is the bubble.

04

Interleaving: Smaller Chunks, Smaller Bubble

Megatron-LM’s interleaved schedule gives each device \(v\) smaller chunks of layers spread round the pipeline (device 1 holds layers 1–2 and 9–10, say), cutting the bubble to \((p-1)/(vm)\), at the price of \(v\) times as many sends between devices. The site’s simulation against the closed forms (results.md §12):

ScheduleDevices pMicro-batches mChunks vSimulated bubbleClosed form
gpipe4810.37500.3750
1f1b4810.37500.3750
interleaved4820.18750.1875
interleaved4840.09380.0938
1f1b83210.21880.2188
interleaved83240.05470.0547
gpipe163210.46880.4688
1f1b166410.23440.2344

Largest difference between simulation and formula: 0.0.

05

Tensor Parallelism

Cut each layer’s matrices instead (Shoeybi et al. 2019, Megatron-LM):

X (replicated)
→
W1 split by columns: GELU(XW1(i)) per device
→
W2 split by rows: partial sums
→
all-reduce

The FFN’s first matrix (Decoder, chapter 4) split by columns lets each of \(t\) devices compute its own slice of the hidden layer, GELU included, with no communication; the second, split by rows, gives each a partial sum of the output, and one all-reduce adds them. Attention splits the same way, a group of heads per device (the heads are already independent, Decoder, chapter 3).

Why it stays inside one server

Two all-reduces of the activations per layer in the forward pass and two in the backward, every layer, every micro-batch: far more traffic than data parallelism’s once-per-step gradient sync, so tensor parallelism lives on NVLink. In the systems model, Megatron’s 18.4-billion-parameter run (\(t = 8\), no pipeline) spends 1.67 s of its 10.61 s step in those all-reduces.

06

Sequence, Context and Expert Parallelism

Sequence parallelism

Tensor parallelism shares the matrix products but not LayerNorm or dropout, whose activations each device would still hold in full. Sequence parallelism splits those along the sequence, turning each all-reduce into a reduce-scatter and an all-gather (the same bytes) and cutting activations per device by \(t\) (Korthikanti et al. 2022).

Context parallelism

For very long sequences, split the sequence itself for attention too: each device keeps its own queries and gets everyone’s keys and values, passed round a ring while computing (Liu et al. 2023, ring attention) or all-gathered first, as Llama 3 does for its 128K-token stage (§3.3.2).

Expert parallelism

Mixture-of-experts layers (GShard; Switch Transformers) send each token to its expert’s device and back with two all-to-all exchanges per layer, where every device sends a different piece to every other.

07

3-D and 4-D Layouts

Real runs combine them: tensor parallelism inside a server, pipeline stages across servers, data parallelism (often sharded, ZeRO or FSDP) outermost. Llama 3 405B trained with four dimensions, [tensor, context, pipeline, data], on up to 16,384 GPUs; its first stage used 8-way tensor, 16-stage pipeline and 64-way data parallelism (Grattafiori et al. 2024, Table 4).

tensor t = 8
inside one 8-GPU server, NVLink
pipeline p = 16
across servers: point-to-point sends of activations
data d = 64
outermost: one gradient sync per step

8 × 16 × 64 = 8,192 GPUs. Choosing a layout trades the memory each device must hold against the time lost to communication and bubbles; the site’s layout explorer runs its systems model on published shapes.

08

How Good Is the Systems Model?

Arithmetic with one fitted constant: the fraction of peak the matrix products reach, η = 0.473, fitted on Megatron-LM’s smallest run. Every other row is a prediction for a published run, with only shapes, layouts, batch sizes and GPU specifications as inputs (Narayanan et al. 2021, Table 1; Llama 3, Table 4; results.md §11a):

100 200 300 400 100 200 300 400 published TFLOP/s per GPU systems model TFLOP/s per GPU published = predictedMegatron-LM, A100 (1.7B fitted)Llama 3 405B, H100
Each point is one published run: Narayanan et al. 2021 Table 1 (A100) and Llama 3 Table 4 (H100). Points below the dashed line are under-predictions (results.md §11a).

Stated band: every prediction within 18.6% of the published throughput (Megatron 18.6%, Llama 3 10.3%; mean 10.8%). Every prediction is low: the model overlaps nothing, and one η cannot follow matrix products getting more efficient as models widen (Megatron’s measured throughput per GPU rises from 137 to 163 TFLOP/s across its table; the model’s stays near 130). Assumptions where the papers are silent: one sequence per micro-batch, the most interleaving the layer count allows, BF16 on the wire.

09

What to Take Away